The present invention is generally directed to the construction of liquid crystal display devices. More particularly, the present invention is directed to redundant conductor structures provided for x and y address lines in liquid crystal display (LCD) devices.
A liquid crystal display device typically comprises a pair of flat panels sealably containing a quantity of liquid crystal material. These liquid crystal materials typically fall into two categories: dichroic dyes in a guest/host system or twisted nematic materials. The flat panels generally possess transparent electrode material disposed on their inner surfaces in predetermined patterns. One panel is often covered completely by a single transparent "ground plane" electrode. The opposite panel is configured with an array of transparent electrodes, referred to herein as "pixel" (picture element) electrodes. Thus, the typical cell in a liquid crystal display includes liquid crystal material disposed between a pixel electrode and a ground electrode forming, in effect, a capacitor-like structure disposed between transparent front and back panels. In general, however, transparency is only required for one of the two panels and the electrodes disposed thereon.
In operation, the orientation of liquid crystal material is affected by voltages applied across the electrodes on either side of the liquid crystal material. Typically, a voltage applied to the pixel electrode effects a change in the optical properties of the liquid crystal material. This optical change causes the display of information on the liquid crystal display (LCD) screen. In conventional digital watch displays and in newer LCD screens used in miniature television receivers, the visual effect is typically produced by variations in reflected light. However, the utilization of transparent front and back panels and transparent electrodes also permit the visual effects to be produced by transmissive effects. These transmissive effects may be facilitated by separately powered light sources for the display, including fluorescent light type devices. LCD display screens may also be employed to produce color images through the incorporation of color filter mosaics in registration with the pixel electrode array. Some of these structures may employ polarizing filters to either enhance or provide the desired visual effect.
Various electrical mechanisms are employed to sequentially turn on and off individual pixel elements in an LCD display. For example, metal oxide varistor devices have been employed for this purpose. However, the utilization of thin film semiconductor switch elements is most relevant herein. In particular, a preferable switch element comprises a thin film field effect transistor (FET). These devices are preferred in LCD displays because of their potentially small size, low power consumption, switching speeds, ease of fabrication, and compatibility with conventional LCD structures.
The pixel elements in an LCD are typically arranged in a rectangular array of rows and columns. Each pixel electrode is associated with its own FET switch device. Each switch device is connected to a data line and a gate line. Electrical signals applied simultaneously to each of these lines permit each pixel to be addressed independently. Accordingly, the LCD is typically provided with a set of parallel data lines which can be made to address cells in a horizontal or x direction. Likewise, gate lines are provided for accessing cells in a vertical or y direction. In operation, the image on the LCD device may be refreshed at a rate which is typically approximately 60 Hz.
More particularly, amorphous silicon FET addressed liquid crystal matrix displays provide an attractive approach to high contrast, flat panel television type displays. Ideally, in an FET addressed LCD device, when the FET is turned on, the "liquid crystal capacitor" charges to the data or source line voltage. When the FET is turned off, the data voltage is stored on the liquid crystal capacitor.
Specific attention is now directed to certain problems occurring in LCD display devices which are solved by the practice of the present invention. In particular, in thin film FET driven liquid crystal displays, the horizontal and vertical address lines (that is, the gate lines and data lines) must all be continuous. For example, in a display having a matrix of 400.times.400 pixel cells with a resolution of 4 lines per millimeter (100 lines per inch), the total length of the address lines is approximately 100,000 mm. The width of the lines should be less than approximately 10 microns in order to maintain a high relative percentage of active cell area in the display. In the fabrication of these devices, defects can occur in many of the processing steps. These defects may occur as a result of dust or dirt interfering with metal deposition or adhesion, flaws in photoresist patterns used to etch the metal lines, scratches, etc. Additionally, defects in these lines can result from unsatisfactory step coverage. This occurs in those situations where metal lines are required to traverse a vertical or near vertical side wall structure, for example, in an etched insulating layer. These steps typically occur at points in the device at which the horizontal and vertical lines cross over one another. In integrated circuit fabrication, typical open line defect probabilities for lines of this width are of the order of 10.sup.-5 per mm. It is therefore apparent that methods for reducing the probability of open x and y addressing lines and methods for enhancing the yield of the LCD device are desired.